Empirical Evaluation Of Compressive Hashing
Muthulakshmi Muthukumarasamy and Henry Dietz
As the gap between processor function unit speed and memory
speed continues to increase, it becomes appropriate to consider
more aggressive methods for making data available when the
processor needs them. Hardware write buffers, caches,
out-of-order execution and prefetch logic are commonly used to
reduce the time spent waiting for data accesses from memory.
Compiler loop interchange and layout transformations could also
be used to decrease the cost of main memory accesses.
Unfortunately, many applications have access patterns for which
none of the standard approaches are helpful.
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