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Funded by the Vicerreitoría de Investigación of the University of A Coruña and the Ministry of Education and Science of Spain

Universidade de A Coruña Ministerio de
		      Educación y Ciencia

Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power using Optimizing Compiler Techniques

Emre Özer1, Andy Nisbet2, Milan Tichy3 and David Gregg3
1 ARM Ltd., Cambridge, UK
2 Manchester Metropolitan University, UK
3 University of Dublin, Ireland

This paper introduces a compiler framework that optimizes embedded applications written in C, and produces high-level hardware descriptions of the applications for customization on field programmable gate arrays (FPGAs). Our compiler performs machine-specific and machine-independent optimizations such as loop parallelization and parallel expression scheduling to improve performance, as well as optimizations to reduce power and chip area. Our experimental results show that our compiler framework can increase performance by an average of 38% for eight embedded benchmarks. Also area usage and power consumption are reduced by 69% and 55% respectively through the efficient utilization of on-chip FPGA resources for Xilinx Virtex-II FPGA chip.

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