Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power using Optimizing Compiler Techniques
Emre Özer1, Andy
Nisbet2, Milan Tichy3
and David Gregg3
This paper introduces a compiler framework that optimizes embedded applications written in C, and produces high-level hardware descriptions of the applications for customization on field programmable gate arrays (FPGAs). Our compiler performs machine-specific and machine-independent optimizations such as loop parallelization and parallel expression scheduling to improve performance, as well as optimizations to reduce power and chip area. Our experimental results show that our compiler framework can increase performance by an average of 38% for eight embedded benchmarks. Also area usage and power consumption are reduced by 69% and 55% respectively through the efficient utilization of on-chip FPGA resources for Xilinx Virtex-II FPGA chip.
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